Methods of forming NMOS/PMOS transistors with source/drains including strained materials
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United States of America Patent
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Mar 23, 2010
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app pub date -
May 17, 2006
filing date -
Aug 24, 2005
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Abstract
A method of forming an integrated circuit includes selectively forming active channel regions for NMOS and PMOS transistors on a substrate parallel to a <100> crystal orientation thereof and selectively forming source/drain regions of the NMOS transistors with Carbon (C) impurities therein.
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