Void-free copper filling of recessed features for semiconductor devices

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United States of America Patent

PATENT NO 7884012
APP PUB NO 20090087981A1
SERIAL NO

11864566

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Abstract

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A method is provided for void-free copper (Cu) filling of recessed features in a semiconductor device. The method includes providing a patterned substrate containing a recessed feature, depositing a barrier film on the patterned substrate, including in the recessed feature, depositing a Ru metal film on the barrier film, and depositing a discontinuous Cu seed layer on the Ru metal film, where the Cu seed layer partially covers the Ru metal film in the recessed feature. The method further includes exposing the substrate to an oxidation source gas that oxidizes the Cu seed layer and the portion of the Ru metal film not covered by the Cu seed layer, heat-treating the oxidized Cu seed layer and the oxidized Ru metal film under high vacuum conditions or in the presence of an inert gas to activate the oxidized Ru metal film for Cu plating, and filling the recessed feature with bulk Cu metal. The exposure to the oxidation source gas can be an air exposure commonly encountered in semiconductor device manufacturing prior to Cu plating.

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Patent Owner(s)

  • TOKYO ELECTRON LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ishizaka, Tadahiro Watervliet, US 110 5778
Jomen, Miho Watervliet, US 9 176
Rullan, Jonathan Albany, US 3 77
Suzuki, Kenji Guilderland, US 999 10860

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