Method of making a MOSFET device with reduced sensitivity of threshold voltage to source to substrate voltage variations
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United States of America Patent
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Jun 30, 1981
Issued Date -
N/A
app pub date -
Mar 12, 1979
filing date -
Aug 31, 1977
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A MOSFET device structure is disclosed where the channel region has formed therein a buried layer of dopant of the same conductivity type as the source and drain, so that the depletion layers for the PN junctions at the upper and lower boundaries thereof intersect in the middle of the implanted region, effectively forming a buried insulator layer between the source and drain. The presence of this layer increases the distance between the mirrored electrostatic charges in the gate and in the bulk of the substrate beneath the MOSFET, thereby reducing the sensitivity of the threshold voltage of the device to variations in the source to substrate voltage.
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