On-board FIFO memory module for high speed digital sourcing and capture to/from DUT (device under test) using a clock from DUT
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United States of America Patent
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Dec 29, 2009
Grant Date -
Apr 17, 2008
app pub date -
Oct 13, 2006
filing date -
Oct 13, 2006
priority date (Note) -
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status (Latency Note)
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Abstract
In a method and system for testing, a tester (110) is operable to communicate test signals (124, 126) at a tester clock speed, and a device (190) to be tested is operable to communicate the test signals (124, 126) at a device clock speed, the device clock speed being greater than the tester clock speed. A test module (120) is interposed between the tester (110) and the device (190) to enable data transfer between the tester (110) and the device (190) at their respective clock speeds. The test module (120) includes a memory module (250) capable of storing N samples of the test signals (124, 126) at a selectable one of the tester clock speed and the device clock speed. The memory module (250) is operable to provide the N samples at a selectable one of the tester clock speed and the device clock speed.
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