Method and apparatus for selecting stimulus locations during limited access circuit test
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United States of America Patent
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-
Jul 24, 2001
Grant Date -
N/A
app pub date -
Oct 9, 1998
filing date -
Oct 9, 1998
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A system that can test individual components having tolerances on a circuit board without complete access to every node on the board is disclosed. The system uses a method that develops test limits from a model of the board, component tolerances, and a list of accessible nodes. A method of reducing the complexity of the test problem by limiting the number of components under consideration is also disclosed. A method of reducing the complexity of the test problem by limiting the number of nodes under consideration is also disclosed. A method of picking nodes to apply stimulus to a board is also disclosed. Finally, a method of correcting for certain parasitics associated with tester hardware is disclosed.
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