Process for filling submicron spaces with dielectric
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United States of America Patent
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Dec 14, 1993
Issued Date -
N/A
app pub date -
Jul 21, 1992
filing date -
Dec 20, 1991
priority date (Note) -
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Abstract
A process for filling submicron, high aspect ratio gaps, that may have reentrant angles, with a high quality ILD. A first ILD layer is deposited using PECVD to partially fill the gap. Medium-pressure sputter etching is then used to remove the bread-loaf edges and redeposit the etched material in the gaps, thereby allowing small gaps with high aspect ratios and reentrant angles to be completely filled. Finally, a second ILD layer that completely fills the gap is deposited using PECVD.
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