Frame-based phase-locked display controller and method thereof

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United States of America Patent

PATENT NO 7773153
APP PUB NO 20060170823A1
SERIAL NO

11316290

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Abstract

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A frame-based phase-locked display controller used in a display system and method thereof are described. The frame-based phase-locked display controller for displaying a plurality of image frames in a video signal comprises a frame-based phase-locked loop and a synchronization signal generator. The frame-based phase-locked loop receives an oscillating signal and an input vertical synchronous signal to generate an output clock signal by phase-lock loop based on the frames. The synchronization signal generator, coupled to the frame-based phase-locked loop, receives the output clock signal to generate an output horizontal synchronous signal, an output vertical synchronous signal and an output display enable (DE) signal. The frame-based phase-locked loop comprises a first PLL, a frequency synthesizer, a second PLL, a fast phase detector, a phase frequency detector and an active pixel region generator. The active pixel region generator receives an input vertical synchronous signal to generate a reference signal associated with an active pixel region. The frame-based phase-locked loop frame-based phase-locks the display enable signal to the reference signal.

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Patent Owner(s)

  • MSTAR SEMICONDUCTOR, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
FanChiang, Hsu-lin Hsinchu, TW 5 26
Hung, Jui-hung Hsinchu, TW 17 24
Tsai, Hui-min Hsinchu, TW 9 41

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