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Abstract

An apparatus for minimal phase delay and zero crossing filtering, obtaining a filtered signal without phase delay and glitch by combining a zero crossing filter and a hysteresis zero crossing filter. The zero crossing filter and the hysteresis zero crossing filter both receive an input signal and a reference signal and respectively output a zero-delay signal with glitches and a hysteresis signal with phase delay. A phase-protect filter then receives these two signals and outputs the filtered signal. When the zero-delay signal has a change of state and the hysteresis signal is at the first state, the filtered signal is at the second state. When the zero-delay signal has a change of state and the hysteresis signal is at the second state, the filtered signal is at the first state. When the zero-delay signal has no change of state, the filtered signal remains unchanged.

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First Claim