Wear leveling for non-volatile memory using data write counters

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United States of America Patent

PATENT NO 11782605
APP PUB NO 20200174677A1
SERIAL NO

16204811

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Abstract

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A memory system has a controller (e.g., CPU, FPGA, or GPU) and recording segments in a non-volatile memory (e.g., a flash memory device) used by the controller to store data. The controller is configured to: maintain data write counters for the recording segments; select a first segment of the recording segments for recording data from a host system, wherein selecting the first segment comprises scanning the data write counters to identify a first data write counter corresponding to the first segment; receive, from the host system, data to be recorded by the non-volatile memory; and write the received data to the selected first segment.

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Patent Owner(s)

Patent OwnerAddress
MICRON TECHNOLOGY INC8000 SOUTH FEDERAL WAY POST OFFICE BOX 6 BOISE ID 83707-0006

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Golov, Gil Backnang, DE 120 374

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