Method for fabricating semiconductor device with programmable anti-fuse feature

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United States of America Patent

PATENT NO 11735520
SERIAL NO

17490587

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Abstract

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The present application discloses a method for fabricating a semiconductor device. The method includes providing a substrate, forming a peak portion on the substrate, forming a gate insulating layer on the substrate and the peak portion, forming a gate bottom conductive layer on the gate insulating layer, and forming a first doped region in the substrate and adjacent to one end of the gate insulating layer.

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Patent Owner(s)

  • NANYA TECHNOLOGY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huang, Chin-Ling Taoyuan, TW 37 35

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