Method for in-situ removal of side walls in MOM capacitor formation
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United States of America Patent
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Dec 2, 2003
Issued Date -
N/A
app pub date -
Aug 8, 2002
filing date -
Dec 17, 1999
priority date (Note) -
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Abstract
A method for fabricating an MOM capacitor (10) includes forming a first conductive layer (18) on an insulating support (12, 14), depositing a dielectric film (20) on the conductive layer, and patterning the dielectric film to define the capacitor feature. The dielectric film may comprise a stack of oxide and nitride layers (22, 24, 26). The dielectric is etched anisotropically with a fluorocarbon plasma to remove unwanted dielectric material (38) around the capacitor feature. Sidewalls (40), built up during the anisotropic etch as a result of sputtering the first conductive layer during the necessary overetch, are removed in a low power, higher pressure etch with an SF.sub.6 plasma, which is substantially isotropic in character. The process allows a sidewall-free capacitor to be formed in a single reactor without the need for solvent cleaning to remove the sidewall material.
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