Method to reduce breakdown failure in a MIM capacitor

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United States of America Patent

PATENT NO 11152455
APP PUB NO 20210091169A1
SERIAL NO

16579738

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Abstract

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Various embodiments of the present application are directed towards a method for forming a metal-insulator-metal (MIM) capacitor comprising an enhanced interfacial layer to reduce breakdown failure. In some embodiments, a bottom electrode layer is deposited over a substrate. A native oxide layer is formed on a top surface of the bottom electrode layer and has a first adhesion strength with the top surface. A plasma treatment process is performed to replace the native oxide layer with an interfacial layer. The interfacial layer is conductive and has a second adhesion strength with the top surface of the bottom electrode layer, and the second adhesion strength is greater than the first adhesion strength. An insulator layer is deposited on the interfacial layer. A top electrode layer is deposited on the insulator layer. The top and bottom electrode layers, the insulator layer, and the interfacial layer are patterned to form a MIM capacitor.

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Patent Owner(s)

  • TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chu, Rei-Lin Hsin-Chu, TW 12 6
Lin, Hsing-Lien Hsin-Chu, TW 110 940
Tsai, Chia-Shiung Hsin-Chu, TW 506 6305
Wu, Chii-Ming Taipei, TW 105 1134
Yu, Chung-Yi Hsin-Chu, TW 181 1259

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