Structure and method for gate-all-around metal-oxide-semiconductor devices with improved channel configurations

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United States of America Patent

PATENT NO 11830878
APP PUB NO 20220336460A1
SERIAL NO

17858989

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Abstract

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The present disclosure provides an integrated circuit device that comprises a semiconductor substrate having a top surface; a first and a second source/drain features over the semiconductor substrate; a first semiconductor layer extending in parallel with the top surface and connecting the first and the second source/drain features, the first semiconductor layer having a center portion and two end portions, each of the two end portions connecting the center portion and one of the first and second source/drain features; a first spacer over the two end portions of the first semiconductor layer; a second spacer vertically between the two end portions of the first semiconductor layer and the top surface; and a gate electrode wrapping around and engaging the center portion of the first semiconductor layer. The center portion has a thickness smaller than the two end portions.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING CO LTDNO 8 LI-HSIN RD 6 HSINCHU SCIENCE PARK HSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Liaw, Jhon Jhy Hsinchu County, TW 523 5309

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