Digital phase-frequency detector with split control loops for low jitter and fast locking
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United States of America Patent
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Dec 20, 2022
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app pub date -
Dec 17, 2020
filing date -
Dec 17, 2020
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Abstract
A digital phase-frequency detector characterizes a delay between two input clock signals using a ring oscillator. A cycle count of a ring oscillator signal circulating through a loop in the ring oscillator during the delay provides a coarse measurement of the delay. A phase of the ring oscillator signal in the loop at the end of the delay provides a fine measurement of the delay. A digital phase-locked loop may control an oscillation frequency of a digitally-controlled oscillator responsive to the fine measurement of the delay and control a division within a clock divider responsive to the coarse measurement of the delay.
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