Digital measurement circuit and memory system using the same
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United States of America Patent
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Jul 5, 2022
Grant Date -
Nov 26, 2020
app pub date -
Aug 10, 2020
filing date -
Dec 21, 2017
priority date (Note) -
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status (Latency Note)
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Abstract
A digital measurement circuit includes a first input flip-flop which receives a first signal through a data input terminal, receives a first clock signal through a clock input terminal, and outputs a second signal; a second input flip-flop which receives the second signal through a data input terminal, receives a second clock signal, which is an inverted signal of the first clock signal, through a clock input terminal, and outputs a third signal; and a delay line which receives the second signal and outputs first through n-th output signals, wherein n is an integer greater than one, and the first through n-th output signals are sampled based on the third signal to output first through n-th sampling signals is provided.
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