Memory access device outputting transfer request
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United States of America Patent
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Aug 12, 2014
Grant Date -
Oct 7, 2010
app pub date -
Apr 1, 2010
filing date -
Apr 2, 2009
priority date (Note) -
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Abstract
A memory access device includes a second memory coupled between a processor and a first memory; a memory controller configured to transfer a data from the first memory to the second memory based on a transfer request; a read controller configured to read the data from the second memory, output the data to the processor, and control a read pointer indicating an address reading the data from the second memory; and a write controller configured to output the transfer request to the memory controller, wherein the write controller computes an available capacity of the second memory based on the read pointer, a size of the second memory and a cumulative addition value obtained by adding cumulatively a size of the data which is requested from the processor, and outputs the transfer request based on the available capacity.
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