Source offset MOSFET optimized for current voltage characteristic invariance with respect to changing temperatures
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United States of America Patent
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Mar 15, 2011
Grant Date -
May 14, 2009
app pub date -
Oct 31, 2008
filing date -
Nov 13, 2007
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A semiconductor device is disclosed. The semiconductor device includes a source offset type MOS transistor in which a source and a drain are formed on a semiconductor substrate by having a predetermined distance between the source and the drain, and a gate electrode is formed on the semiconductor substrate between the source and the drain via a gate insulation film. One end of the drain overlaps or abuts on one end of the gate electrode when viewed from above the gate electrode, and the source is formed by having a distance from the gate electrode when viewed from above the gate electrode.
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