IC with internal interface switch for testability
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Mar 14, 2006
Issued Date -
N/A
app pub date -
May 26, 1999
filing date -
May 26, 1999
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A semiconductor integrated circuit which is provided with a shift scan path incorporated in each function module and a testing I/O terminal connected to a shift scan path and provided separately from a normal-operation-use I/O terminal, and which comprises, all formed on one semiconductor chip, a bus interface circuit for connecting normal-operation-use I/O terminals of a plurality of function modules to a bus, an external interface switching circuit which switches between the bus-side I/O terminal of the bus interface circuit and the testing I/O terminal of each function module for connection to an external terminal and an interface control circuit for switch-controlling the external interface switching circuit.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully