Memory utilizing oxide-conductor nanolaminates
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United States of America Patent
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May 22, 2007
Grant Date -
Jan 8, 2004
app pub date -
Jul 8, 2002
filing date -
Jul 8, 2002
priority date (Note) -
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Abstract
Structures, systems and methods for floating gate transistors utilizing oxide-conductor nanolaminates are provided. One floating gate transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A floating gate is separated from the channel region by a first gate oxide. The floating gate includes oxide-conductor nanolaminate layers to trap charge in potential wells formed by different electron affinities of the oxide-conductor nanolaminate layers.
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