Formation method of metal layer on resin layer
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United States of America Patent
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Oct 26, 2010
Grant Date -
Dec 6, 2007
app pub date -
Aug 10, 2007
filing date -
Nov 14, 2003
priority date (Note) -
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Abstract
A printed wiring board having a conductor circuit comprising a copper layer adjacent to an insulating layer and an electroless gold plating, wherein the insulating layer has ten-point mean surface roughness (Rz) of 2.0 μm or less is provided. According to the present invention, there is no such a defect that gold plating is deposited on a resin, and fine wiring formation with accuracy is realized.
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