Methods and systems for performing scan testing to identify logic device defects

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United States of America Patent

PATENT NO 8914691
SERIAL NO

13546775

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Abstract

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Provided is a method of testing a logic device. The method includes comparing a first test pattern provided at an input of a first chain of logic device sub-modules with an output from the first chain to determine first type failures and comparing a second test pattern provided at an input of a second chain of logic device sub-modules with an out from the second chain to determine second type failures. An occurrence of one of the first type failures renders the logic device inoperable. An occurrence of the second type of failures is tolerated.

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Patent Owner(s)

  • ADVANCED MICRO DEVICES, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Socarras, Angel Lake Mary, US 3 1

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