Semiconductor memory devices with dielectric fin structures

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United States of America Patent

PATENT NO 11830827
APP PUB NO 20230064751A1
SERIAL NO

17460652

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Abstract

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A device includes a memory cell that randomly presents either a first logic state or a second logic state. The memory cell includes: a plurality of first nanostructures extending along a first lateral direction; a plurality of second nanostructures extending along the first lateral direction and disposed at a first side of the plurality of first nanostructures; a plurality of third nanostructures extending along the first lateral direction and disposed at a second side of the plurality of first nanostructures; a dielectric fin structure disposed immediately next to the plurality of first nanostructures along a second lateral direction, wherein a first sidewall of each of the plurality of first nanostructures facing toward or away from the second lateral direction is in contact with the dielectric fin structure; and a first gate structure wrapping around each of the plurality of first nanostructures except for the first sidewall.

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Patent Owner(s)

Patent OwnerAddress
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTDHSINCHU 300-78

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chang, Meng-Sheng Chubei, TW 160 136
Huang, Chia-En Xinfeng Township, TW 240 327

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