Output data compression scheme using tri-state
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United States of America Patent
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May 30, 2006
Grant Date -
Mar 4, 2004
app pub date -
Aug 28, 2002
filing date -
Aug 28, 2002
priority date (Note) -
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Abstract
A memory device uses data compression to read data from an array of the memory during testing. The compressed data is either a logic one, logic zero or tri-state, depending upon the data read from the array. Output drivers of the memory are placed in a tri-state condition in response to a detected read error. Non-compressed internal I/O lines are used during testing to provide control signals to the driver circuitry to selectively place drivers in the tri-state mode. Once a tri-state is detected four columns of memory cells can be replaced with four columns of redundant memory cells without requiring additional non-compressed testing.
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