Scheme for reordering instructions via an instruction caching mechanism
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United States of America Patent
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Jul 19, 2005
Grant Date -
Oct 23, 2003
app pub date -
Apr 23, 2002
filing date -
Apr 23, 2002
priority date (Note) -
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status (Latency Note)
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Abstract
A method and system for storing instructions retrieved from memory in a memory cache to provide said instructions to a processor. First a new instruction is received from the memory. The system then determines whether the new instruction is a start of a basic block of instructions. If the new instruction is the start of a basic block of instructions, the system determines whether the basic block of instructions is stored in the memory cache responsive. If the basic block of instructions is not stored in the memory cache, the system retrieves the basic block of instructions for the new instruction from the memory. The system then stores the basic block of instructions in a buffer. The system then predicts a next basic block of instructions needed by the processor from the basic block of instructions. The system determines whether the next block of instructions is stored in the cache memory and retrieves the next basic block of instructions from the memory if the next block of instructions is not stored in memory.
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