Method and related apparatus for chip testing
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United States of America Patent
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May 23, 2006
Grant Date -
N/A
app pub date -
Jun 30, 2005
filing date -
Apr 1, 2005
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A chip capable of performing self testing includes: an output circuit for generating output signals; a transmitting circuit coupled to the output circuit for transmitting output signals generated by the output circuit; a receiving circuit for receiving signals transmitted to the chip and generating corresponding receiving signals; a first multiplexer; and an input circuit coupled to an output port of the first multiplexer for receiving outputs of the first multiplexer, wherein the first multiplexer includes: a first input port coupled to the output circuit for receiving output signals generated by the output circuit; and a second input port coupled to the receiving circuit for receiving signals generated by the receiving circuit.
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