Compensation word line driver
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United States of America Patent
Stats
-
Jan 9, 2024
Grant Date -
Sep 1, 2022
app pub date -
May 20, 2022
filing date -
Sep 27, 2019
priority date (Note) -
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status (Latency Note)
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Abstract
Memory systems are provided. In an embodiment, a memory device includes a word line driver coupled to a plurality of word lines, a recycle multiplexer coupled to a plurality of bit lines and a plurality of bit line bars, a memory cell array, and a compensation word line driver. The memory cell array includes a first end adjacent the word line driver, a second end away from the word line driver, and a plurality of memory cells. The compensation word line driver is disposed adjacent the second end of the memory cell array and coupled to the plurality of word lines. The recycle multiplexer is configured to selectively couple one or more of the plurality of bit lines or one or more of the plurality of bit line bars to the compensation word line driver.
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