Method of forming semiconductor structure having contact plug

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United States of America Patent

PATENT NO 8921226
SERIAL NO

13740289

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Abstract

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A method of forming a semiconductor structure having at least a contact plug includes the following steps. At first, at least a transistor and an inter-layer dielectric (ILD) layer are formed on a substrate, and the transistor includes a gate structure and two source/drain regions. Subsequently, a cap layer is formed on the ILD layer and on the transistor, and a plurality of openings that penetrate through the cap layer and the ILD layer until reaching the source/drain regions are formed. Afterward, a conductive layer is formed to cover the cap layer and fill the openings, and a part of the conductive layer is further removed for forming a plurality of first contact plugs, wherein a top surface of a remaining conductive layer and a top surface of a remaining cap layer are coplanar, and the remaining cap layer totally covers a top surface of the gate structure.

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Patent Owner(s)

  • UNITED MICROELECTRONICS CORP.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Huang, Chih-Sen Tainan, TW 80 930
Hung, Ching-Wen Tainan, TW 112 936
Liou, En-Chiuan Tainan, TW 155 700
Tsao, Po-Chao New Taipei, TW 87 851

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