Method of automating place and route corrections for an integrated circuit design from physical design validation
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United States of America Patent
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Nov 27, 2007
Grant Date -
May 4, 2006
app pub date -
Oct 29, 2004
filing date -
Oct 27, 2004
priority date (Note) -
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Abstract
A method and computer program product for automatically correcting errors in an integrated circuit design includes steps of: (a) performing a physical design validation of an integrated circuit design to verify compliance with a set of design rules; (b) generating a results database of design rule violations detected by the physical design validation; (c) identifying locations in the integrated circuit design from the results database for making design corrections according to a post-processing rule deck so that the locations of the design corrections comply with the set of design rules; and (d) implementing the design corrections in the integrated circuit design.
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