Instructions and logic to perform floating-point and integer operations for machine learning

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United States of America Patent

PATENT NO 11169799
SERIAL NO

16432402

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Abstract

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One embodiment provides for a graphics processing unit to accelerate machine-learning operations, the graphics processing unit comprising a multiprocessor having a single instruction, multiple thread (SIMT) architecture, the multiprocessor to execute at least one single instruction; and a first compute unit included within the multiprocessor, the at least one single instruction to cause the first compute unit to perform a two-dimensional matrix multiply and accumulate operation, wherein to perform the two-dimensional matrix multiply and accumulate operation includes to compute a 32-bit intermediate product of 16-bit operands and to compute a 32-bit sum based on the 32-bit intermediate product.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATIONSANTA CLARA CA 95054

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Anders, Mark A Hillsboro, US 57 568
Appu, Abhishek R El Dorado Hills, US 520 1795
Barik, Rajkishore Santa Clara, US 67 754
Chen, Xiaoming Shanghai, CN 231 1871
Galoppo, Von Borries Nicolas C Portland, US 52 530
Jahagirdar, Sanjeev Folsom, US 99 1240
Kaul, Himanshu Portland, US 51 492
Koker, Altug El Dorado Hills, US 520 2131
Lin, Tsung-Han Campbell, US 66 771
Mathew, Sanu K Hillsboro, US 105 980
Nurvitadhi, Eriko Hillsboro, US 94 1149
Ranganathan, Vasanth El Dorado Hills, US 172 636
Ray, Joydeep Folsom, US 564 2163
Shpeisman, Tatiana Menlo Park, US 89 1481
Sinha, Kamal Rancho Cordova, US 128 753
Strickland, Michael S Sunnyvale, US 40 339
Tang, Ping T Edison, US 61 541
Vembu, Balaji Folsom, US 314 2176
Yao, Anbang Beijing, CN 134 1445

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