Instructions and logic to perform floating-point and integer operations for machine learning

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United States of America Patent

PATENT NO 11169799
SERIAL NO

16432402

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Abstract

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One embodiment provides for a graphics processing unit to accelerate machine-learning operations, the graphics processing unit comprising a multiprocessor having a single instruction, multiple thread (SIMT) architecture, the multiprocessor to execute at least one single instruction; and a first compute unit included within the multiprocessor, the at least one single instruction to cause the first compute unit to perform a two-dimensional matrix multiply and accumulate operation, wherein to perform the two-dimensional matrix multiply and accumulate operation includes to compute a 32-bit intermediate product of 16-bit operands and to compute a 32-bit sum based on the 32-bit intermediate product.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATIONSANTA CLARA CA

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Anders, Mark A Hillsboro, US 57 566
Appu, Abhishek R El Dorado Hills, US 518 1767
Barik, Rajkishore Santa Clara, US 67 747
Chen, Xiaoming Shanghai, CN 230 1860
Galoppo, Von Borries Nicolas C Portland, US 52 521
Jahagirdar, Sanjeev Folsom, US 99 1234
Kaul, Himanshu Portland, US 51 490
Koker, Altug El Dorado Hills, US 517 2093
Lin, Tsung-Han Campbell, US 66 758
Mathew, Sanu K Hillsboro, US 105 970
Nurvitadhi, Eriko Hillsboro, US 94 1136
Ranganathan, Vasanth El Dorado Hills, US 170 625
Ray, Joydeep Folsom, US 560 2131
Shpeisman, Tatiana Menlo Park, US 89 1479
Sinha, Kamal Rancho Cordova, US 128 741
Strickland, Michael S Sunnyvale, US 40 333
Tang, Ping T Edison, US 61 536
Vembu, Balaji Folsom, US 314 2152
Yao, Anbang Beijing, CN 133 1416

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