Configurable memory system for embedded processors
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United States of America Patent
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Oct 9, 2007
Grant Date -
Aug 11, 2005
app pub date -
Feb 11, 2004
filing date -
Feb 11, 2004
priority date (Note) -
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Abstract
An embedded processor architecture includes a processing core with configurable memory system. Memory components can be inserted, omitted and resized in different configuration of the memory system without causing irregular features that may cause wasted silicon area. Furthermore, all the various configurations of the memory system are designed to interface with the processing core so that the processing core can be reused without change.
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