Image decoding apparatus, recording medium which computer can read from, and program which computer can read

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7228064
APP PUB NO 20030026487A1
SERIAL NO

10211716

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Abstract

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The present invention provides an image decoding apparatus that realizes speed-up processing of taking out an MR (macroblock remainder) from a fixed length unit that consists of a first DCT block and the MR, without increasing cost. A Setup processor 3 outputs one out of a plurality of fixed length units that constitute an SB (synchronized block). First, calculation is performed for a length from a beginning of the fixed length unit to a EOB (end of block) that is included in the fixed length unit. The calculated length is then used as an offset in taking out the MR. Then an end portion of a second DCT block that is included in the MR is combined with a corresponding beginning portion of the second DCT block, in order to obtain the complete second DCT block. The complete second DCT block is outputted to a variable length code decoder 13.

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Patent Owner(s)

  • MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hirai, Makoto Suita, JP 56 675
Ieda, Yukiharu Nagoya, JP 1 3
Kiyohara, Tokuzo Osaka, JP 63 1171
Nishida, Hideshi Nishinomiya, JP 45 687
Wada, Yoshiyuki Neyagawa, JP 46 405
Yoshioka, Kosuke Daito, JP 17 249

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