Configuration data loopback in a bus bridge circuit
Number of patents in Portfolio can not be more than 2000
United States of America
Stats
-
Apr 20, 1999
Grant Date -
N/A
app pub date -
Dec 19, 1996
filing date -
Jun 5, 1992
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A method and apparatus for reducing cost and complexity of devices in a bus bridge circuit by dividing address and data paths between separate devices to reduce pin count, and by looping back 'bridged' configuration data to access configuration registers. The host bridge circuit 'bridges' all I/O accesses received over a host bus directly to a peripheral component bus without any decoding. The CDC is both initiator and target on the peripheral component bus for I/O access cycles generated by the host bridge circuit that are targeted for a host bridge configuration register.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully