Method and apparatus for reducing power consumption in digital electronic circuits

Number of patents in Portfolio can not be more than 2000

United States of America

PATENT NO RE36839
SERIAL NO

09212854

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Abstract

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An integrated circuit with power conservation includes a number of functional blocks, each of which includes a digital circuitry and at least one output control line, and a power controller coupled to the control lines. The output control lines develop clock control signals based upon a functional block's knowledge of the direction of data flow. The power controller the reduces power by deactivating functional blocks that are not needed as indicated by the clock control signals. More specifically, a system with power conservation includes a number of functional blocks capable of processing data, each of the functional blocks including a modulated clock input and N+1 clock control lines which reflect the direction of data flow, where N is a number of neighbors of a particular functional block, and a clock controller having an input clock, the clock controller being coupled to the modulated clock inputs and the clock control lines of the functional blocks. The clock controller is operative to modulate the input clock in accordance with the signals on the clock control lines to provide modulated clocks to each of the plurality of functional blocks. A method for reducing power consumption includes the steps of: a) receiving control signals from a number of functional blocks; b) selectively deactivating a particular functional block upon a request from that functional block or from another functional block; and c) activating the particular functional block upon a request from another functional block.

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Patent Owner(s)

Patent OwnerAddress
CONVERSANT INTELLECTUAL PROPERTY MANAGEMENT INC390 MARCH ROAD SUITE 100 OTTAWA K2K 0G7

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jayavant, Rajeev Fort Collins, CO 14 532
Simmons, Laura E Corvallis, OR 13 338

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