Integrated circuit protected against electrostatic discharges, with variable protection threshold
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United States of America Patent
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Dec 18, 2001
Grant Date -
N/A
app pub date -
Sep 21, 1995
filing date -
Nov 6, 1987
priority date (Note) -
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Abstract
To protect integrated circuits as efficiently as possible against electrostatic discharges, by putting a diode in avalanche mode without untimely triggering of this avalance mode by overvoltages of non-electrostatic origin, the following solution is proposed: through an insulated gate surrounding the cathode of the diode, the threshold for transition into avalanche mode of the diode is modified according to the slope of the overvoltages appearing at the terminal to be protected. The gate is connected to the terminal by an integrating circuit in such a way that the overvoltages are applied to the gate with a certain delay, inducing a potential difference between the cathode and the gate which is all the greater as the front of the overvoltage is steep. The avalanche triggering threshold is higher in the latter case than in the former one, and it is thus distinguish between overvoltages of diverse origins.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
SGS-THOMSON MICROELECTRONICS INC | 1310 ELECTRONICS DRIVE M/S 2345 CARROLLTON TX 75006 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
---|---|---|---|
Kowalski, Jacek | Trets, FR | 51 | 1225 |
Tailliet, Francois | Epinay sur Seine, FR | 80 | 438 |
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Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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