Laterally diffused MOS transistor having N+ source contact to N-doped substrate

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United States of America Patent

PATENT NO RE42403
SERIAL NO

12139020

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Abstract

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Reduced source resistance is realized in a laterally diffused MOS transistor by fabricating the transistor in a P-doped epitaxial layer on an N-doped semiconductor substrate and using a trench contact for ohmically connecting the N-doped source region to the N-doped substrate.

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Patent Owner(s)

Patent OwnerAddress
ROVEC ACQUISITIONS LTD L L C1209 ORANGE STREET WILMINGTON DE 19801

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Babcock, Jeff Santa Clara, US 8 104
Darmawan, Johan Agus Cupertino, US 7 145
Mason, John Sunnyvale, US 75 1423

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