Method of manufacturing a semiconductor device
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United States of America Patent
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Jun 12, 2012
Grant Date -
N/A
app pub date -
Oct 8, 2004
filing date -
May 13, 2000
priority date (Note) -
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Abstract
In a patterning process of a semiconductor device having inverted stagger type TFTs, a normal photolithography step using diazo naphthoquinone (DNQ)-Novolac resin based positive photo resist is applied, and a problem of the area dependency of the photo resist pattern side wall taper angle may occur. The problem is critical for the reason of influence on variation of an etching shape in a dry-etching step. The present invention has an object to solve the above problem. In a photolithography step, which is patterning step of a semiconductor device having inverted stagger type TFTs, by adjusting a pre-bake temperature or a PEB (post-exposure-bake) temperature, and positively performing evacuation of solvent in a state of a photo resist film, the volume contraction by evacuation of solvent at the post-bake is reduced, and the problem of the area dependency of the photo resist pattern side wall taper angle is solved, which is deformation due to the volume contraction.
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