METHOD AND SYSTEM FOR ANALYZING PERFORMANCE METRICS OF ARRAY TYPE CIRCUITS UNDER PROCESS VARIABILITY

Number of patents in Portfolio can not be more than 2000

United States of America Patent

APP PUB NO 20100250187A1
SERIAL NO

12730926

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

A method is disclosed for analyzing a performance metric of an array type electronic circuit under process variability effects. The electronic circuit has an array with a plurality of array elements and an access path being a model of the array type electronic circuit. The model includes building blocks having all hardware to access one array element in the array. Each building block has at least one basic element. In one aspect, the method includes deriving statistics of the access path due to variations in the building blocks under process variability of the basic elements, and deriving statistics of the full array type electronic circuit by combining the results of the statistics of the access path under awareness of the array architecture.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
IMECLEUVEN

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Anchlia, Ankur Indore, IN 3 117
Dobrovolny, Petr Brno, CZ 5 39
Miranda, Corbalan Miguel Kessel-Lo, BE 5 35
Zuber, Paul Brunnthal, DE 1 25

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation