ADJUSTING MEMORY PARAMETERS

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United States of America Patent

APP PUB NO 20180032400A1
SERIAL NO

15224988

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Abstract

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In various examples, a device comprises a memory. The memory comprises a plurality of dies and logic. The logic may: determine a tolerable bit error rate (BER) of the memory based on whether one of the plurality of dies has failed, and adjust a parameter of the memory based on the tolerable BER.

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Patent Owner(s)

Patent OwnerAddress
HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP1701 EAST MOSSY OAKS ROAD SPRING TX 77389

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Foltin, Martin Ft. Collins, US 47 174
Lesartre, Gregg B Ft. Collins, US 96 734

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