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Abstract

A network switch device is described. The network switch device includes a plurality of processor devices configured to perform different respective functions of the network switch device, a block of shared memory having a plurality of single port memory banks, and a memory controller configured to allocate respective sets of banks among the single port memory banks to processor devices among the plurality of processor devices, and determine respective configurations of the sets of memory banks as one of i) a single port configuration in which respective single port memory banks support a single read or write memory operation to a memory location in a memory access cycle, and ii) a virtual multi-port configuration in which respective single port memory banks support two or more concurrent read or write memory operations to a same memory location, based on memory access requirements of the corresponding processor device.

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First Claim