Current dump circuit for bipolar random access memories
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United States of America Patent
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-
Oct 16, 1984
Grant Date -
N/A
app pub date -
Jan 18, 1982
filing date -
Jan 18, 1982
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
Circuitry for rapidly discharging a row of RAM cells upon deselection of the word line. The word line switching transistor collector current is sensed and corresponding voltage level signals are applied to a second switching transistor between the bottom word line of the memory row and a large dump current source. The emitter of the second switching transistor is clamped at a level that will permit the switching transistor to turn on only when there is no emitter current through the word line switching transistor to thereby rapidly discharge the capacitive row of memory cells and therefore improve the operating speed of the memory.
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