Importance

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Abstract

An ECL-TTL signal level converter includes a first transistor pair having transistors controlled by ECL signals. A second transistor pair is connected to the transistors of the first transistor pair. Collector resistors are connected between the transistors of the second transistor pair and a first supply potential. A third transistor pair has transistors connected to the transistors of the first transistor pair. A fourth transistor pair has transistors connected to the transistors of the first transistor pair and to the transistors of the third transistor pair. A current impressing device is connected between the transistors of the fourth transistor pair and a second supply potential. A push-pull output stage is connected to the transistors of the second transistor pair for the emission of a TTL signal.

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First Claim