Method of suppressing diffusion in a semiconductor device

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 7592243
APP PUB NO 20060046372A1
SERIAL NO

11260464

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Abstract

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An impurity-diffused layer having an extension structure is formed first by implanting Sb ion as an impurity for forming a pocket region; then by implanting N as a diffusion-suppressive substance so as to produce two peaks in the vicinity of the interface with a gate electrode and at an amorphous/crystal interface which serves as an defect interface generated by the impurity in the pocket region; and by carrying out ion implantations for forming an extension region and deep source and drain regions.

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Patent Owner(s)

  • FUJITSU SEMICONDUCTOR LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fukutome, Hidenobu Kawasaki , JP 25 347
Momiyama, Youichi Kawasaki , JP 10 61
Okabe, Kenichi Kasugai , JP 39 805
Saiki, Takashi Kawasaki , JP 32 151

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