Thin, thermally enhanced flip chip in a leaded molded package
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United States of America Patent
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Oct 26, 2010
Grant Date -
May 8, 2008
app pub date -
Dec 20, 2007
filing date -
Oct 22, 2001
priority date (Note) -
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status (Latency Note)
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Abstract
Semiconductor die packages and methods of making them are disclosed. An exemplary package comprises a leadframe having a source lead and a gate lead, and a semiconductor die coupled to the source and gate leads at a first surface of the leadframe. The source lead has a protruding region at a second surface of the leadframe. A molding material is disposed around the semiconductor die, the gate lead, and the source lead such that a surface of the die and a surface of the protruding region are left exposed by the molding material. An exemplary method comprises obtaining the semiconductor die and leadframe, and forming a molding material around at least a portion of the leadframe and die such that a surface of the protruding region is exposed through the molding material.
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