Depletion MOS transistor and charging arrangement

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United States of America Patent

PATENT NO 8247874
SERIAL NO

12868918

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Abstract

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A depletion transistor includes a source region and a drain region of a first conductivity type, a channel region of the first conductivity type arranged between the source region and the drain region and a first gate electrode arranged adjacent the channel region and dielectrically insulated from the channel region by a gate dielectric. The depletion transistor further includes a first discharge region of a second conductivity type arranged adjacent the gate dielectric and electrically coupled to a terminal for a reference potential. The depletion transistor can be included in a charging circuit.

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Patent Owner(s)

Patent OwnerAddress
INFINEON TECHNOLOGIES AUSTRIA AG9500 VILLACH

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hirler, Franz Isen, DE 429 5078
Mauder, Anton Kolbermoor, DE 346 3157
Pfirsch, Frank Munich, DE 113 1822
Weyers, Joachim Hoehenkirchen, DE 51 299

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