Clock-data recovery and method for binary signaling using low resolution ADC

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United States of America Patent

PATENT NO 8451949
APP PUB NO 20100086090A1
SERIAL NO

12574506

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Abstract

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A binary signal detection based on low resolution ADC includes: a variable-gain amplifier for amplifying an input signal with a gain factor controlled by a gain setting to generate an amplified signal; an ADC for converting the amplified signal into a converter output in accordance with a timing provided by a recovered clock, wherein the converter output has N levels; a timing detection circuit for generating a timing error signal based on the converter output; a filter for filtering the timing error signal to generate a control signal; a controllable oscillator for generating the recovered clock under a control of the control voltage; an automatic gain control for processing the converter data to set the gain setting to control the gain factor; and a data recovery circuit for generate a recovered data based on the converter output.

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Patent Owner(s)

Patent OwnerAddress
REALTEK SEMICONDUCTOR CORP2 INNOVATION RD II SCIENCE PARK HSINCHU

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lin, Chia-Liang Fremont, US 122 1029

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