Clock-data recovery and method for binary signaling using low resolution ADC
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United States of America Patent
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May 28, 2013
Grant Date -
Apr 8, 2010
app pub date -
Oct 6, 2009
filing date -
Oct 7, 2008
priority date (Note) -
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Abstract
A binary signal detection based on low resolution ADC includes: a variable-gain amplifier for amplifying an input signal with a gain factor controlled by a gain setting to generate an amplified signal; an ADC for converting the amplified signal into a converter output in accordance with a timing provided by a recovered clock, wherein the converter output has N levels; a timing detection circuit for generating a timing error signal based on the converter output; a filter for filtering the timing error signal to generate a control signal; a controllable oscillator for generating the recovered clock under a control of the control voltage; an automatic gain control for processing the converter data to set the gain setting to control the gain factor; and a data recovery circuit for generate a recovered data based on the converter output.
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