Test circuit for testing through-silicon-vias in 3D integrated circuits

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United States of America Patent

PATENT NO 8773157
APP PUB NO 20130002272A1
SERIAL NO

13174617

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Abstract

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A test circuit and method for testing through-silicon-vias (TSVs) in three-dimensional integrated circuits (ICs) during each phase of manufacturing is disclosed. In one aspect, the method includes testing for faults in each individual TSV, TSV-under-test, shorts between a TSV-under-test, and TSVs in close proximity and for connections between the TSV-under-test and another tier in the ICs. A test circuit has three switchable current paths connected to a power supply via a pull-up resistor and switches: a calibration path, a short path, and a current measurement path. A power supply is connected to the measurement path, and the calibration path and the short path are connected to ground via respective pull-down resistors. For each TSV-under-test, the desired operation mode is selected by the closure of different combinations of switches. The current flowing through the pull-up resistor in each operation mode indicates whether the TSV-under-test has passed or failed the test.

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Patent Owner(s)

Patent OwnerAddress
IMECKAPELDREEF 75 LEUVEN 3001

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Badaroglu, Mustafa Leuven, BE 40 338
Marchal, Paul Blanden, BE 26 600
Marinissen, Erik Jan Leuven, BE 11 124

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