Method for manufacturing three-dimensional semiconductor memory device
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United States of America Patent
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Jun 30, 2015
Grant Date -
Aug 8, 2013
app pub date -
Jun 30, 2011
filing date -
Dec 29, 2010
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Abstract
The present disclosure provides a method for manufacturing a three-dimensional semiconductor memory device. In the method, a storage array is divided into a plurality of storage sub-arrays. As a result, a respective via of each storage sub-array can be etched respectively, which is different from the prior art, where a via for a bottom electrode of a plurality of layers of resistive cells is etched at one time. The vias are filled with metal so that storage sub-arrays are connected with each other. The method for manufacturing the three-dimensional semiconductor memory device according to the present disclosure can substantially reduce process complexity and difficulty of etching process in high-density integration, and also improve a number of layers of the resistive cells integrated in the storage array.
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