Electrical margining of multi-parameter high-speed interconnect links with multi-sample probing

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United States of America Patent

PATENT NO 9817054
SERIAL NO

13729756

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Abstract

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Methods and apparatus relating to electrical margining of multi-parameter high-speed interconnect links with multi-sample probing are described. In one embodiment, logic is provided to generate one or more parameter values, corresponding to an electrical operating margin of an interconnect. The one or more parameter values are generated based on a plurality of eye observation sets to be detected in response to operation of the interconnect in accordance with a plurality of parameter sets (e.g., by using quantitative optimization techniques). In turn, the interconnect is to be operated at the one or more parameter values if it is determined that the one or more parameter values cause the interconnect to operate at an optimum level relative to an operation of the interconnect in accordance with one or more less optimum parameter levels. Other embodiments are also disclosed and claimed.

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INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chhabbi, Shreesh Bangalore, IN 2 6
Iyer, Venkatraman Austin, US 117 1511
Kumar, Arvind A Beaverton, US 11 166
Rangarajan, Thanunathan Bangalore, IN 23 294

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