METHOD FOR SUPPRESSING LEAKAGE CURRENT OF TUNNEL FIELD-EFFECT TRANSISTOR, CORRESPONDING DEVICE, AND MANUFACTURING METHOD

World Intellectual Property Organization Patent

APP PUB NO WO-2015070528-A1
SERIAL NO

PCTCN2014070364

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Provided are a method for suppressing a leakage current of a tunnel field-effect transistor (TFET), a corresponding device, and a manufacturing method, related to the field of field-effect transistor logic devices and circuits in CMOS ultra large-scale integration (ULSI). By inserting an insulating layer (7) between a source region (10) and a transistor body below a tunneling junction, and by inserting no insulating layer at a tunneling junction between a source region and a channel, a source/drain direct tunneling leakage current in a small-sized TFET device is effectively suppressed, and a threshold slope is effectively improved. The manufacturing method for the corresponding device is completely compatible with an existing CMOS process.

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Patent OwnerAddress
UNIV BEIJINGCNHAIDIAN DISTRICT BEIJING 100871 5# SUMMER PALACE ROAD

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Inventor(s)

Inventor Name Address
WANG CHAO 中国北京市北京经济技术开发区地泽路9号 BEIJING 100176 100176
WANG JIAXIN 中国河北省唐山市丰润区厂前路3号 HEBEI 063035 063035
HUANG RU 中国北京市海淀区颐和园路5号 100871 100871
WU CHUNLEI 中国上海市浦东新区张江高科技园区张衡路825号 SHANGHAI 201203 201203
HUANG QIANQIAN JIANGSU
WANG YANGYUAN HANGZHOU ZHEJIANG

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